Performance Improvement of the Two Dimensional Broadcast-based Distributed Shared Memory Multiprocessor Architecture

Abasikeles I., AKAY M. F.

9th International Conference on Electronics Computer and Computation (ICECCO 2012), Ankara, Turkey, 1 - 03 November 2012, pp.159-162 identifier

  • Publication Type: Conference Paper / Full Text
  • Volume:
  • City: Ankara
  • Country: Turkey
  • Page Numbers: pp.159-162
  • Çukurova University Affiliated: Yes


Latency is an ever-increasing component of data access cost, which in turn is usually the bottleneck for distributed shared memory (DSM) multiprocessor architectures. In this paper, we decrease the latency of the DSM system on a two-dimensional (2D) broadcast-based optical architecture by using message priority and combining techniques. The simulated system contains 64 nodes. Each node has a processor, a directory controller, a cache controller, two output channels and two input queues. Scenarios are run to measure average total latency, average network response time and average channel waiting time. The results show that with the application of message priority and combining mechanisms, the average total latency decreases by 11%, the average network response time decreases by 17%.