Design and implementation of an FPGA-based parallel graphics renderer for displaying CSG surfaces and volumes

Cevik U.

COMPUTERS & ELECTRICAL ENGINEERING, cilt.30, sa.2, ss.97-117, 2004 (SCI-Expanded) identifier identifier

  • Yayın Türü: Makale / Tam Makale
  • Cilt numarası: 30 Sayı: 2
  • Basım Tarihi: 2004
  • Doi Numarası: 10.1016/j.compeleceng.2002.10.001
  • Dergi Adı: COMPUTERS & ELECTRICAL ENGINEERING
  • Derginin Tarandığı İndeksler: Science Citation Index Expanded (SCI-EXPANDED), Scopus
  • Sayfa Sayıları: ss.97-117
  • Çukurova Üniversitesi Adresli: Evet

Özet

In this paper, the design and implementation of a high-speed "CSG renderer" for displaying convex and concave objects and its performance analysis are presented. The renderer comprises a binary tree-structured depth generator that produces the depth values of a plane at each pixel on the display window simultaneously, and pipelined pixel processors that processes the depth values, a corner bender, and a frame-buffer.